Carl Seger
When in doubt, verify.
Dr. Carl-Johan (Carl) Seger received his Ph.D. in Computer Science from University of Waterloo, Canada, in 1988. After a career in academia at Carnegie Mellon University and the University of British Columbia, he spent the next 21 years at Intel Corp. where drove the development and successful wide deployment of formal verification of Intel's microprocessors. After taking early retirement in 2016 he rejoined academia and is currently a WASP Professor at Chalmers University of Technology. In addition to formal verification of hardware, Dr. Seger's research interests focuses on how to design and verify correct, robust, and secure software/hardware systems for autonomous vehicles and other autonomous systems.
Keynote: Functional Programming for Hardware Design: The Good, The Bad, The Ugly.
Functional Languages have proved to be very versatile for hardware design and verification tasks. In this talk I will illustrate this by following the evolution over almost 30 years of the Voss design and verification system and its integral functional language fl. From a simple evaluation and command language to a specification, implementation and system language we will follow how fl evolved so that many HW designs tasks could be performed very efficiently (“the good”). We will also see examples where this was not the case (“the bad”) as well as places where much more work is needed to make the system easy to use (“the ugly”).
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